Transistor sizing for timing optimization of combinational digital CMOS circuits

An edition of Transistor sizing for timing optimization of combinational digital CMOS circuits (1990)

Transistor sizing for timing optimization of combinational digital CMOS circuits

By Lucas Sebastian Heusler

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Publish Date

1990

Publisher

Language

eng

Pages

102

Description:

subjects: Complimentary Metal oxide semiconductors, Design and construction, Metal oxide semiconductors, Complimentary, Transistor-transistor logic circuits