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Verification issues of virtual components in system-on-a-chip (SOC) designs

Verification issues of virtual components in system-on-a-chip (SOC) designs

By Manfred Stadler

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Publish Date

2000

Publisher

Hartung-Gorre

Language

eng

Pages

180

1-1 of 1 Editions

Verification issues of virtual components in system-on-a-chip (SOC) designs

View Verification issues of virtual components in system-on-a-chip (SOC) designs
Verification issues of virtual components in system-on-a-chip (SOC) designs

Language: eng

Pages: 180

Published In: 2000

Publisher: Hartung-Gorre