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Cover of Multiple-valued programmable logic array minimization by simulated annealing

Multiple-valued programmable logic array minimization by simulated annealing

By Gerard W. Dueck

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Publish Date

1992

Publisher

Naval Postgraduate School,Available from National Technical Information Service

Language

eng

Pages

27

1-1 of 1 Editions

Multiple-valued programmable logic array minimization by simulated annealing

Language: eng

Pages: 27

Published In: 1992

Publisher: Naval Postgraduate School, Available from National Technical Information Service