An edition of Analysis and Design of CMOS Clocking Circuits for Low Phase Noise (2020)
Analysis and Design of CMOS Clocking Circuits for Low Phase Noise
By Woorham Bae,Deog-Kyoon Jeong
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Publish Date
2020
Publisher
Institution of Engineering & Technology,The Institution of Engineering and Technology
Language
eng
Pages
300
Description:
subjects: Complementary Metal oxide semiconductors, Textbooks, Design and construction, Digital integrated circuits, Clocks, CMOS integrated circuits, Delay lock loops, Digital phase locked loops, Hardware description languages, Injection locked oscillators, Integrated circuit design, Integrated circuit modelling, Integrated circuit noise, Interference suppression, Jitter, Multiplying circuits, Network analysis, Phase noise, Voltage-controlled oscillators