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View Analysis and Design of CMOS Clocking Circuits for Low Phase Noise By Woorham Bae,Deog-Kyoon Jeong 
Analysis and Design of CMOS Clocking Circuits for Low Phase Noise
By Woorham Bae,Deog-Kyoon Jeong
View Real world FPGA design with Verilog By Ken Coffman 
Real world FPGA design with Verilog
By Ken Coffman
View Specification and verification of gate-level VHDL models of synchronous and asynchronous circuits By David M. Russinoff
Specification and verification of gate-level VHDL models of synchronous and asynchronous circuits
Specification and verification of gate-level VHDL models of synchronous and asynchronous circuits
By David M. Russinoff
View VHDL and FPLDs in digital systems design, prototyping and customization By Zoran Salcic 
VHDL and FPLDs in digital systems design, prototyping and customization
By Zoran Salcic
View Description and simulation of a fast packet switch architecture for communication satellites By Jorge A. Quintana
Description and simulation of a fast packet switch architecture for communication satellites
Description and simulation of a fast packet switch architecture for communication satellites
By Jorge A. Quintana