1-24 of 45 Books

Principles of verifiable RTL design
By Lionel Bening,Lionel Bening,Harry D. Foster

Timing optimization through clock skew scheduling
By Ivan S. Kourtev,Ivan S. Kourtev,Eby G. Friedman,Baris Taskin

Switch-level timing simulation of MOS VLSI circuits
By Vasant B. Rao,David V. Overhauser,Timothy N. Trick,Ibrahim N. Hajj

Hardware annealing in analog VLSI neurocomputing
By Bang W. Lee,Bank W. Lee,Bing J. Sheu

Computer-aided design and VLSI device development
By Kit Man Cham,Soo-Young Oh,John L. Moll

Proceedings of the ASP-DAC'98
By Asia and South Pacific Design Automation Conference (3rd 1998 Yokohama, Japan),Japan) Asia and South Pacific Design Automation Conference (3rd : 1998 : Yokohama,Institute of Electrical and Electronics Engineers

Introduction to VLSI silicon devices
By Badih El-Kareh,R.J. Bombard

Algorithms and techniques for VLSI layout synthesis
By Dwight D. Hill,Dwight Hill,Don Shugard,John Fishburn,Kurt Keutzer

VLSI design for manufacturing
By Director, Stephen W.,Stephen W. Director,Wojciech Maly,Andrzej J. Strojwas

Systolic arrays
By International Workshop on Systolic Arrays (1st 1986 Oxford),Will Moore,Andrew McCabe

IWSM
By International Workshop on Statistical Metrology (3rd 1998 Honolulu, Hawaii),IEEE Electron Devices Society,Institute of Electrical and Electronics Engineers

High speed CMOS design styles
By Kerry Bernstein,Kerry Bernstein,K.M. Carrig,Christopher M. Durham,Patrick R. Hansen,David Hogenmiller,Edward J. Nowak,Norman J. Rohrer

Spectral techniques in VLSI CAD
By Mitchell Aaron Thornton,Rolf Drechsler,D. Michael Miller
1996 Symposium on VLSI Circuits
1996 Symposium on VLSI Circuits
By Symposium on VLSI Circuits (10th 1996 Honolulu, Hawaii),IEEE Solid-State Circuits Council,Institute of Electrical and Electronics Engineers

VLSI synthesis of DSP kernels
By Mahesh Mehendale,Sunil D. Sherlekar

Cross-talk noise immune VLSI design using regular layout fabrics
By Sunil P. Khatri,Sunil P. Khatri,Robert K. Brayton,Alberto L. Sangiovanni-Vincentelli

Essentials of electronic testing for digital, memory, and mixed-signal VLSI circuits
By Michael L. Bushnell,Vishwani D. Agrawal

Proceedings
By IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (1999 Albuquerque, N.M.),IEEE Computer Society,Institute of Electrical and Electronics Engineers

Materials and process characterization for VLSI, 1988 (ICMPC '88)
By International Conference Materials and Process characterization for VLSI (1988 Shanghai, China),X-F Zong,Y-Y Wang

Analog VLSI integration of massive parallel signal processing systems
By Peter Kinget,Michiel Steyaert

High-level synthesis
By Daniel D. Gajski,Nikil D. Dutt,Allen C-H Wu,Steve Y-L Lin

1999 Symposium on VLSI Circuits
By Symposium on VLSI Circuits (13th 1999 Kyoto, Japan),Institute of Electrical and Electronics Engineers,Ch&&&&&

Advanced simulation and test methodologies for VLSI design
By G. Russell,I.L. Sayers

2000 TENCON Proceedings
By Trends in Electronics Conference (2000 Kuala Lumpur, Malaysia),Malaysia) Trends in Electronics Conference (2000 Kuala Lumpur,Malaysia) TENCON (2000 : Kuala Lumpur