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very-large-scale integration (vlsi)

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View Principles of verifiable RTL design By Lionel Bening,Lionel Bening,Harry D. Foster
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Principles of verifiable RTL design

By Lionel Bening,Lionel Bening,Harry D. Foster

View Timing optimization through clock skew scheduling By Ivan S. Kourtev,Ivan S. Kourtev,Eby G. Friedman,Baris Taskin
Cover of Timing optimization through clock skew scheduling by ivan s. kourtev,ivan s. kourtev,eby g. friedman,baris taskin

Timing optimization through clock skew scheduling

By Ivan S. Kourtev,Ivan S. Kourtev,Eby G. Friedman,Baris Taskin

View Switch-level timing simulation of MOS VLSI circuits By Vasant B. Rao,David V. Overhauser,Timothy N. Trick,Ibrahim N. Hajj
Cover of Switch-level timing simulation of MOS VLSI circuits by vasant b. rao,david v. overhauser,timothy n. trick,ibrahim n. hajj

Switch-level timing simulation of MOS VLSI circuits

By Vasant B. Rao,David V. Overhauser,Timothy N. Trick,Ibrahim N. Hajj

View Hardware annealing in analog VLSI neurocomputing By Bang W. Lee,Bank W. Lee,Bing J. Sheu
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Hardware annealing in analog VLSI neurocomputing

By Bang W. Lee,Bank W. Lee,Bing J. Sheu

View Computer-aided design and VLSI device development By Kit Man Cham,Soo-Young Oh,John L. Moll
Cover of Computer-aided design and VLSI device development by kit man cham,soo-young oh,john l. moll

Computer-aided design and VLSI device development

By Kit Man Cham,Soo-Young Oh,John L. Moll

View Proceedings of the ASP-DAC'98 By Asia and South Pacific Design Automation Conference (3rd 1998 Yokohama, Japan),Japan) Asia and South Pacific Design Automation Conference (3rd : 1998 : Yokohama,Institute of Electrical and Electronics Engineers
Cover of Proceedings of the ASP-DAC'98 by asia and south pacific design automation conference (3rd 1998 yokohama, japan),japan) asia and south pacific design automation conference (3rd : 1998 : yokohama,institute of electrical and electronics engineers

Proceedings of the ASP-DAC'98

By Asia and South Pacific Design Automation Conference (3rd 1998 Yokohama, Japan),Japan) Asia and South Pacific Design Automation Conference (3rd : 1998 : Yokohama,Institute of Electrical and Electronics Engineers

View Introduction to VLSI silicon devices By Badih El-Kareh,R.J. Bombard
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Introduction to VLSI silicon devices

By Badih El-Kareh,R.J. Bombard

View Algorithms and techniques for VLSI layout synthesis By Dwight D. Hill,Dwight Hill,Don Shugard,John Fishburn,Kurt Keutzer
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Algorithms and techniques for VLSI layout synthesis

By Dwight D. Hill,Dwight Hill,Don Shugard,John Fishburn,Kurt Keutzer

View VLSI design for manufacturing By Director, Stephen W.,Stephen W. Director,Wojciech Maly,Andrzej J. Strojwas
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VLSI design for manufacturing

By Director, Stephen W.,Stephen W. Director,Wojciech Maly,Andrzej J. Strojwas

View Systolic arrays By International Workshop on Systolic Arrays (1st 1986 Oxford),Will Moore,Andrew McCabe
Cover of Systolic arrays by international workshop on systolic arrays (1st 1986 oxford),will moore,andrew mccabe

Systolic arrays

By International Workshop on Systolic Arrays (1st 1986 Oxford),Will Moore,Andrew McCabe

View IWSM By International Workshop on Statistical Metrology (3rd 1998 Honolulu, Hawaii),IEEE Electron Devices Society,Institute of Electrical and Electronics Engineers
Cover of IWSM by international workshop on statistical metrology (3rd 1998 honolulu, hawaii),ieee electron devices society,institute of electrical and electronics engineers

IWSM

By International Workshop on Statistical Metrology (3rd 1998 Honolulu, Hawaii),IEEE Electron Devices Society,Institute of Electrical and Electronics Engineers

View High speed CMOS design styles By Kerry Bernstein,Kerry Bernstein,K.M. Carrig,Christopher M. Durham,Patrick R. Hansen,David Hogenmiller,Edward J. Nowak,Norman J. Rohrer
Cover of High speed CMOS design styles by kerry bernstein,kerry bernstein,k.m. carrig,christopher m. durham,patrick r. hansen,david hogenmiller,edward j. nowak,norman j. rohrer

High speed CMOS design styles

By Kerry Bernstein,Kerry Bernstein,K.M. Carrig,Christopher M. Durham,Patrick R. Hansen,David Hogenmiller,Edward J. Nowak,Norman J. Rohrer

View Spectral techniques in VLSI CAD By Mitchell Aaron Thornton,Rolf Drechsler,D. Michael Miller
Cover of Spectral techniques in VLSI CAD by mitchell aaron thornton,rolf drechsler,d. michael miller

Spectral techniques in VLSI CAD

By Mitchell Aaron Thornton,Rolf Drechsler,D. Michael Miller

View 1996 Symposium on VLSI Circuits By Symposium on VLSI Circuits (10th 1996 Honolulu, Hawaii),IEEE Solid-State Circuits Council,Institute of Electrical and Electronics Engineers

1996 Symposium on VLSI Circuits

1996 Symposium on VLSI Circuits

By Symposium on VLSI Circuits (10th 1996 Honolulu, Hawaii),IEEE Solid-State Circuits Council,Institute of Electrical and Electronics Engineers

View VLSI synthesis of DSP kernels By Mahesh Mehendale,Sunil D. Sherlekar
Cover of VLSI synthesis of DSP kernels by mahesh mehendale,sunil d. sherlekar

VLSI synthesis of DSP kernels

By Mahesh Mehendale,Sunil D. Sherlekar

View Cross-talk noise immune VLSI design using regular layout fabrics By Sunil P. Khatri,Sunil P. Khatri,Robert K. Brayton,Alberto L. Sangiovanni-Vincentelli
Cover of Cross-talk noise immune VLSI design using regular layout fabrics by sunil p. khatri,sunil p. khatri,robert k. brayton,alberto l. sangiovanni-vincentelli

Cross-talk noise immune VLSI design using regular layout fabrics

By Sunil P. Khatri,Sunil P. Khatri,Robert K. Brayton,Alberto L. Sangiovanni-Vincentelli

View Essentials of electronic testing for digital, memory, and mixed-signal VLSI circuits By Michael L. Bushnell,Vishwani D. Agrawal
Cover of Essentials of electronic testing for digital, memory, and mixed-signal VLSI circuits by michael l. bushnell,vishwani d. agrawal

Essentials of electronic testing for digital, memory, and mixed-signal VLSI circuits

By Michael L. Bushnell,Vishwani D. Agrawal

View Proceedings By IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (1999 Albuquerque, N.M.),IEEE Computer Society,Institute of Electrical and Electronics Engineers
Cover of Proceedings by ieee international symposium on defect and fault tolerance in vlsi systems (1999 albuquerque, n.m.),ieee computer society,institute of electrical and electronics engineers

Proceedings

By IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (1999 Albuquerque, N.M.),IEEE Computer Society,Institute of Electrical and Electronics Engineers

View Materials and process characterization for VLSI, 1988 (ICMPC '88) By International Conference Materials and Process characterization for VLSI (1988 Shanghai, China),X-F Zong,Y-Y Wang
Cover of Materials and process characterization for VLSI, 1988 (ICMPC '88) by international conference materials and process characterization for vlsi (1988 shanghai, china),x-f zong,y-y wang

Materials and process characterization for VLSI, 1988 (ICMPC '88)

By International Conference Materials and Process characterization for VLSI (1988 Shanghai, China),X-F Zong,Y-Y Wang

View Analog VLSI integration of massive parallel signal processing systems By Peter Kinget,Michiel Steyaert
Cover of Analog VLSI integration of massive parallel signal processing systems by peter kinget,michiel steyaert

Analog VLSI integration of massive parallel signal processing systems

By Peter Kinget,Michiel Steyaert

View High-level synthesis By Daniel D. Gajski,Nikil D. Dutt,Allen C-H Wu,Steve Y-L Lin
Cover of High-level synthesis by daniel d. gajski,nikil d. dutt,allen c-h wu,steve y-l lin

High-level synthesis

By Daniel D. Gajski,Nikil D. Dutt,Allen C-H Wu,Steve Y-L Lin

View 1999 Symposium on VLSI Circuits By Symposium on VLSI Circuits (13th 1999 Kyoto, Japan),Institute of Electrical and Electronics Engineers,Ch&&&&&
Cover of 1999 Symposium on VLSI Circuits by symposium on vlsi circuits (13th 1999 kyoto, japan),institute of electrical and electronics engineers,ch&&&&&

1999 Symposium on VLSI Circuits

By Symposium on VLSI Circuits (13th 1999 Kyoto, Japan),Institute of Electrical and Electronics Engineers,Ch&&&&&

View Advanced simulation and test methodologies for VLSI design By G. Russell,I.L. Sayers
Cover of Advanced simulation and test methodologies for VLSI design by g. russell,i.l. sayers

Advanced simulation and test methodologies for VLSI design

By G. Russell,I.L. Sayers

View 2000 TENCON Proceedings By Trends in Electronics Conference (2000 Kuala Lumpur, Malaysia),Malaysia) Trends in Electronics Conference (2000 Kuala Lumpur,Malaysia) TENCON (2000 : Kuala Lumpur
Cover of 2000 TENCON Proceedings by trends in electronics conference (2000 kuala lumpur, malaysia),malaysia) trends in electronics conference (2000 kuala lumpur,malaysia) tencon (2000 : kuala lumpur

2000 TENCON Proceedings

By Trends in Electronics Conference (2000 Kuala Lumpur, Malaysia),Malaysia) Trends in Electronics Conference (2000 Kuala Lumpur,Malaysia) TENCON (2000 : Kuala Lumpur